Electrostatic discharge (ESD) is a static buildup of electrons that is then discharged. ESD is a problem in integrated circuits. An ESD event can arise from a number of sources such as improper handling of a device or printed circuit board or the like. The magnitude of ESD can vary widely, but the duration of a pulse is usually very short. An ESD event can result injunction failure, contact damage, filamentation, oxide thermal damage, oxide breakdown, charge injection and fusing (opening) of interconnects.
Because ESD is such a prevalent problem, on chip ESD protection circuits typically used on integrated circuits for I/O and power supply cells are the main measures to cope with ESD problems. The role of these protection circuits is to ensure that, in case of an ESD event, a discharge pulse is safely diverted to ground and does not destroy or damage the logic circuitry.
Typical ESD protection devices have a snapback voltage (Vab) at which the device enters an operating region known as snapback. Snapback is a state of a device in which the current/voltage curve of the device, when the snapback voltage is reached, will abruptly change, or snap back, to allow the same amount of current to flow at a significantly lower voltage. Source triggering the supply ESD device into snapback and interrupting normal operation of the IC can cause damage to or destruction of the device and/or IC. It is intended that snapback does not occur during normal part operation, but does occur during an unbiased ESD event.
As gate oxide thicknesses in semiconductor devices, such as metal oxide semiconductor (MOS) devices, decrease, it becomes important to keep the snapback voltage of electrostatic discharge protection devices low enough that they can protect the input buffer. However, if the snapback trigger voltage is close to the operating voltage (Vcc) for example during burnin, then the ESD devices can be accidentally triggered by minor undershoot (on the order of −0.5 volts) and cause electrical noise or even more severe problems. It is less likely but still possible to cause customer issues (such as excessive Vcc noise).
ESD protection circuitry is typically used on integrated circuits to help in protecting sensitive electronic components from an ESD event. Typical on-chip ESD protection circuits include one or more of the following: snapback devices, diodes, diode strings, silicon controlled rectifiers (SCRs), and the like. A snapback device as used herein includes by way of example and not by way of limitation metal oxide semiconductor (MOS) devices, shallow trench isolation (STI) field isolation devices in which two adjacent n+ diffusion regions are separated by an STI oxide, local oxidation of silicon (LOCOS) field oxide devices, and the like.
Electro-Static-Discharge (ESD) phenomena are becoming a major reliability- and cost-constraint for integrated circuit (IC) components. Besides the usual anti static precautions in the production sites of electronic components, better on chip ESD protection circuits for I/O and power supply cells are the main measures to cope with ESD problems. The role of these protection circuits is to ensure that, in case of an ESD event, the discharge pulse is safely diverted to ground and does not destroy or damage the logic circuitry.
Snapback occurs because of parasitic bipolar transistor devices that are present in nearly all snapback devices. There is a need in the art to control unintended triggering of the ESD snapback protection device during operation of the IC.